Computer organization and architecture : designing for performance / William Stallings.

Vistie el Sitio: http://williamstallings.com/COA5e.html (visto 27/11/18).

CONTENIDO
Preface ix
PART I OVERVIEW 1
Chapter 1. Introduction 3
Organization and Architecture 5
Structure and Function 6
Outline of the Book 12
Internet and Web Resources 15
Chapter 2. Computer Evolution and Performance 17
A Brief History of Computers 19
Designing for Performance 39
Pentium and PowerPC Evolution 43
Recommended Reading and Web Sites 46
PART II THE COMPUTER SYSTEM 49
Chapter 3. System Buses 51
Computer Components 53
Computer Function 56
Interconnection Structures 69
Bus Interconnection 71
PCI 80
Recommended Reading and Web Sites 89
Chapter 4. Internal Memory 95
Computer Memory System Overview 97
Semiconductor Main Memory 103
Cache Memory 117
Pentium II and PowerPC Cache Organizations 132
Advanced DRAM Organization 137
Recommended Reading and Web Sites 142
Chapter 5. External Memory 153
Magnetic Disk 155
RAID 163
Optical Memory 172
Magnetic Tape 177
Recommended Reading and Web Sites 178
Problems 179
Chapter 6. Input/Output 181
External Devices 184
I/O Modules 188
Programmed I/O 191
Interrupt-Driven I/O 195
Direct Memory Access 203
I/O Channels and Processors 207
The External Interface: SCSI and Fire Wire 209
Recommended Reading and Web Sites 223
Chapter 7. Operating System Support 227
Operating System Overview 229
Scheduling 241
Memory Management 247
Pentium II and PowerPC Memory Management 259
PART III THE CENTRAL PROCESSING UNIT 271
Chapter 8. Computer Arithmetic 273
The Arithmetic and Logic Unit (ALU) 275
Integer Representation 276
Integer Arithmetic 282
Floating-Point Representation 298
Floating-Point Arithmetic 305
Chapter 9. Instruction Sets: Characteristics and Function 323
Machine Instruction Characteristics 325
Types of Operands 331
Pentium II and PowerPC Data Types 333
Types of Operations 336
Pentium II and PowerPC Operation Types 349
Assembly Language 358
Chapter 10. Instruction Sets: Addressing Modes and Formats 373
Addressing 375
Pentium and PowerPC Addressing Modes 382
Instruction Formats 388
Pentium and PowerPC Instruction Formats 397
Chapter 11. CPU Structure and Function 405
Processor Organization 407
Register Organization 409
The Instruction Cycle 414
Instruction Pipelining 419
The Pentium Processor 434
The PowerPC Processor 443
Chapter 12. Reduced Instruction Set Computers 455
Instruction Execution Characteristics 458
The Use of a Large Register File 462
Compiler-Based Register Optimization 467
Reduced Instruction Set Architecture 469
RISC Pipelining 476
MIPS R4000 480
SPARC 488
The RISC versus CISC Controversy 494
Chapter 13. Instruction-Level Parallelism and Superscalar Processors 499
Overview 501
Design Issues 506
Pentium II 515
PowerPC 521
MIPS R10000 529
UltraSPARC-II 531
IA-64/Merced 534
PART IV THE CONTROL UNIT 551
Chapter 14. Control Unit Operation 553
Micro-operations 555
Control of the Processor 561
Hardwired Implementation 573
Recommended Reading 575
Problems 576
Chapter 15. Microprogrammed Control 577
Basic Concepts 579
Microinstruction Sequencing 588
Microinstruction Execution 593
TI 8800 605
Applications of Microprogramming 615
PART V PARALLEL ORGANIZATION 619
Chapter 16. Parallel Processing 621
Multiple Processor Organizations 623
Symmetric Multiprocessors 625
Cache Coherence and the MESI Protocol 635
Clusters 642
Nonuniform Memory Access 646
Vector Computation 650
Appendix A Digital Logic 669
A.1 Boolean Algebra 670
A.2 Gates 672
A.3 Combinational Circuits 675
A.4 Sequential Circuits 696
A.5 Problems 707
Appendix B Projects for Teaching Computer Organization and Architecture 709
B.1 Research Projects 710
B.2 Simulation Projects 710
B.3 Reading/Report Assignments 712
Glossary 713
References 725
Index 739